1. Field of the Invention
The present invention relates to nonvolatile semiconductor memory devices. In particular, the present invention relates to a nonvolatile semiconductor memory device capable of conduct batch erasure of data for memory block to be erased out of a plurality of memory blocks formed in a single well.
2. Description of the Background Art
Conventionally, with a flash memory, a memory array is segmented into a plurality of memory blocks, and data can be erased by memory block. For a first flash memory, each memory block is formed on a surface of an independent well, and a predetermined erasing voltage is applied between a well for a memory block to be erased and word lines of the memory block, thereby erasing data. At this time, 0 V is applied to both a well for a memory block to be not erased and to the word lines of the memory block, so that change in a threshold voltage of a memory cell may be prevented (See Japanese Patent Laying-Open No. 2001-210808, for example).
Further, for a second flash memory, a plurality of memory blocks are formed on a surface of a single well, and a predetermined erasing voltage is applied between the well and word lines of a memory block to be erased, thereby erasing data. At this time, a voltage of the same level that is applied to the well is applied to the word lines of a memory block to be not erased, so that change in a threshold voltage for a memory cell may be prevented (See Japanese Patent Laying-Open No. 2003-031704, for example).
However, with the first flash memory, because each memory block is formed on the surface of an independent well, a separation region is required for separating wells. This poses a problem that a layout area increases by the amount of the separation region.
Further, with the second flash memory, because the plurality of memory blocks are formed on the surface of the single well, a separation region for separating wells is not required, and it is possible to reduce the layout area by that region. However, with this type of flash memory, voltages from independent power supplies are applied to the word line and the well, respectively, and therefore a problem has been noted that the voltage to the word line having a capacity smaller than the well rises faster than the voltage to the well to generate a voltage between the word line and the well, thereby changing the threshold voltage of the memory cell.
Further, with a microcomputer provided with both the first and the second flash memories, an amount of memory required may vary depending on the application, and some of the memory blocks may be deleted to reduce the amount of memory. In such a case, it is necessary to re-layout a peripheral circuitry, and accordingly, the amount of memory may not be easily adjusted.